A4 Memory Pages

Memory pages are 4 KiB in size on many but not all architectures. More modern processors also support sizes up to several MiB. The following macros must be defined in the architecture-specific file asm-arch/page.h to indicate the page size used:

□ PAGE_SHIFT specifies the binary logarithm of the page size. (The kernel implicitly assumes that the page size can be represented as a power of 2, as is true on all architectures supported.)

□ PAGE_SIZE specifies the size of a memory page in bytes.

□ PAGE_ALIGN(addr) aligns any address on the page boundary.

Two standard operations on pages must also be implemented, generally by means of optimized assembler commands:

□ clear_page(start) deletes the page beginning at start by filling it with null bytes.

□ copy_page(to, from) copies the page data at position from to position to.

The page_offset macro specifies the position in virtual address space where the physical pages are to be mapped. On most architectures, this implicitly defines the size of the user address space or the division of the entire address space into a kernel address space and a user address space. However, this does not apply on all architectures. (Sparc is one such exception, because it has two separate address spaces for the kernel and userspace. AMD64 is another exception, because its virtual address space has a non-addressable hole in the middle.) As a result, the TASK_SIZE constant defined in asm-arch/process.h must be used instead of page_offset to determine the size of userspace.

Continue reading here: A5 System Calls

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