Info

#define _cacheline_aligned

_section_(".data.cacheline_aligned")))

Its purpose is to align data on the L1 cache of the processor even if the constant used suggests that alignment is achieved only on multiprocessor systems. The preceding code implements a generic version of the keyword, but individual architectures are free to provide their own definitions:

A slightly stricter version of the macro looks like this: <cache.h>

#define INTERNODE_CACHE_SHIFT L1_CACHE_SHIFT

#define _cacheline_internodealigned_in_smp \

_attribute_((_aligned_(1 << (INTERNODE_CACHE_SHIFT))))

Alignment is based on the maximum possible L1 cache size for the underlying architecture — regardless of whether the processor actually has an L1 cache of this size. This means that the defined alignment yields maximum cache benefits but wastes more space, which is why its use should be carefully considered.

Continue reading here: C17 Inline Assembler

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