Interrupt Descriptor Table

A system table called Interrupt Descriptor Table (IDT) associates each interrupt or exception vector with the address of the corresponding interrupt or exception handler. The IDT must be properly initialized before the kernel enables interrupts.

The IDT format is similar to that of the GDT and the LDTs examined in Chapter 2. Each entry corresponds to an interrupt or an exception vector and consists of an 8-byte descriptor. Thus, a maximum of 256 x 8 = 2048 bytes are required to store the IDT.

The idtr CPU register allows the IDT to be located anywhere in memory: it specifies both the IDT base physical address and its limit (maximum length). It must be initialized before enabling interrupts by using the lidt assembly language instruction.

The IDT may include three types of descriptors; Figure 4-2 illustrates the meaning of the 64

bits included in each of them. In particular, the value of the Type field encoded in the bits 40-43 identifies the descriptor type.

Figure 4-2. Gate descriptors' format

Eli* fttelta fréter

Gi 62 60 iS a 57 ii 5S 5« y 5? Si SO fl? 44 17 4fl 4i 4* 43 42 41 « » ià W 3& J5 M 33 12

Eli* fttelta fréter

Gi 62 60 iS a 57 ii 5S 5« y 5? Si SO fl? 44 17 4fl 4i 4* 43 42 41 « » ià W 3& J5 M 33 12

D

RESERVED

p

P 1

Ö

0

1

0

1

RESERVED

rss SEGMBHSELECTOIt

RESERVEE-

il m jg 3 jï jb >L. h ij zz ji zo is îa u is u h u u n id ? a / & j i ï j î a il m jg 3 jï jb >L. h ij zz ji zo is îa u is u h u u n id ? a / & j i ï j î a

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Ö fi? ¿1 fit) a 17 lfi 5S « ÏÎ il M 49 U 47 4fi il 44 43 4? II 40 39 1H ¥7 ilfi .15 ii ÎJ

Mfm^rfiflte JJiKn^Hiir

Ö fi? ¿1 fit) a 17 lfi 5S « ÏÎ il M 49 U 47 4fi il 44 43 4? II 40 39 1H ¥7 ilfi .15 ii ÎJ

D

DFF5ET(1W1)

P

P 1

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1

1

I

0

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HE5EKVED

SEGMENT SELECTOR

OFFSET (0-15}

]l M » a 2- 26 24 B 22 21 ZJ IP 14 17 16 Ii 14 13 12 II lfl SB 1 6 5 * 3 2 10

]l M » a 2- 26 24 B 22 21 ZJ IP 14 17 16 Ii 14 13 12 II lfl SB 1 6 5 * 3 2 10

ftiqp iflff i>f KtvpîOf

62 il Kl 5ä 57 35 54 Ji 52 il 50 44 47 46 45 44 42 41 40 39 JS If 36 35 34 33 J2

0

OFFSET (tf-31)

P

1

0

1

1

1

1

0

0

0

RESERVED

SEGMENT SELECTOR

OFFSET (MS)

J1 M jy ¡1 71 J& lb Ï4 i' ZZ JI ZD I'J IB 1/ lb li 14 13 1J 11 ID 9 3 f ù J 4 ï J 10

J1 M jy ¡1 71 J& lb Ï4 i' ZZ JI ZD I'J IB 1/ lb li 14 13 1J 11 ID 9 3 f ù J 4 ï J 10

The descriptors are: Task gate

Includes the TSS selector of the process that must replace the current one when an interrupt signal occurs. Linux does not use task gates.

Interrupt gate

Includes the Segment Selector and the offset inside the segment of an interrupt or exception handler. While transferring control to the proper segment, the processor clears the IF flag, thus disabling further maskable interrupts.

Trap gate

Similar to an interrupt gate, except that while transferring control to the proper segment, the processor does not modify the IF flag.

As we shall see in the later section Section 4.4.1, Linux uses interrupt gates to handle interrupts and trap gates to handle exceptions.

Continue reading here: Hardware Handling of Interrupts and Exceptions

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